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Editor: Tom R. Halfhill
In this issue:
Niagara 2 Opens the Floodgates
Harlan McGhan
{11/06/2006}
Sun’s Niagara 1 processor line, marketed under the product name UltraSPARC T1, is unique among contemporary server processors in its pursuit of throughput performance in highly integrated, server-on-a-chip designs. Sun’s new Niagara 2 goes substantially further toward realizing this goal than Niagara 1 does, incorporating full 64-thread execution capability together with four dual FBDIMM DRAM channels, PCI Express, and two 10Gb/s Ethernet controllers on a single 65nm processor chip.
The essential trade-off for packing this sort of capability on a single chip is thread speed. Other server processors seek to maximize thread speed with area- and power-intensive high-speed execution engines featuring superscalar pipelines and out-of-order execution. However, Niagara processors run at relatively low clock speeds and have simple, in-order scalar execution engines.
Sun uses the area saved in two ways: first, to multithread each core eight ways; and second, to replicate each core eight times on die, add a large L2 cache, and integrate all essential memory, network, and I/O interfaces. The result is a 64-way server on a die that’s smaller than other processors use to integrate two dual-threaded cores.
Although threads run far more slowly on a Niagara processor than on other server processors, they do not run 16 times more slowly. Consequently, on throughput measures, UltraSPARC T1 systems are the highest-performing single-chip systems available today. Measured by efficiency, in terms of throughput per watt, they far exceed other systems currently shipping.
Like other non-x86 server processors, Niagara processors must succeed by delivering value not found in high-volume, “industry-standard” servers. Where other processors have chosen to advance to levels of bandwidth, scalability, and security not economically feasible for commodity designs, Niagara processors instead attempt to deliver new levels of efficiency that can drive down the cost of computing.
Microprocessor Report readers can access the full story (9 pages, 7 graphics) here: www.mdronline.com/mpr/h/2006/1106/204501.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.
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